Proc. of Technical Meeting on Electronics Circuits
巻, 号, ページ
Vol. ECT-02
No. 1-12
pp. 13-18
出版年月
2002年1月
出版者
和文:
電気学会
英文:
The Insitute of Electrical Engineers of Japan
会議名称
和文:
電子回路研究会
英文:
IEEJ Technical Meeting on Electronics Circuits
開催地
和文:
熊本
英文:
Kumamoto
アブストラクト
The performance of an integrated circuit is affected by many factors such as matching, temperature, and so on. An active guard band circuit is supposed to give a stable and reliable performance
regardless of those unidealities. However the proposed active guard band circuit performance is affected by device matching which is process dependent. Increasing devices size will give a better matching between devices. On the other hand, a bigger device size may reduce the speed of the circuit. This paper proposes a simple method for the optimization of active guard band circuit design with the consideration on device mismatch and frequency characteristic. Simulation using HSPICE is used to confirm the proposed method.
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