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和文:多回線直流送電における低速直流遮断器の適用可能性の検討―制限電圧の緩和によるアレスタ消費エネルギーの低減― 
英文:Applicability of Low-speed DC Circuit Breakers for Multi-circuit HVDC Transmission - Reduction of Arrester Consumption Energy by Mitigating the Voltage Rating - 
著者
和文: 若月圭眞, 佐野憲一朗.  
英文: Keima Wakatsuki, Kenichiro Sano.  
言語 Japanese 
掲載誌/書名
和文:令和6年電気学会電力・エネルギー部門大会 
英文: 
巻, 号, ページ         pp. 9-15
出版年月 2024年9月 
出版者
和文:電気学会 
英文: 
会議名称
和文:令和6年電気学会電力・エネルギー部門大会 
英文: 
開催地
和文: 
英文: 
アブストラクト Multi-circuit HVDC transmission systems have the advantage of achieving continuous operation after DC faults even with low-speed DC circuit breakers. However, there was a problem of excessive energy consumption of arresters used for overvoltage suppression. This paper proposes a design approach to mitigate the rated voltage of the arresters as a solution. The effectiveness of this approach is verified through simulation. Assuming acceptance of temporary overvoltage (TOV) equivalent to that in AC systems, the proposed approach can reduce the energy consumption of the arresters to 40% of the conventional design. The approach also shows effectiveness in lowering the overload requirements for diodes in onshore converters and the maximum interruption current requirements for DC circuit breakers.

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