"Yun Wang,Bangan Liu,Rui Wu,Hanli Liu,Tn Aravind,Jian Pang,Ning Li,Toru Yoshioka,Yuki Terashima,Haosheng Zhang,Dexian Tang,Makihiko Katsuragi,Daeyoung Lee,Sungtae Choi,Kenichi Okada,Akira Matsuzawa","A 60-GHz 3.0Gb/s Spectrum Efficient BPOOK Transceiver for Low-power Short-range Wireless in 65-nm CMOS",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 5","pp. 1363-1374",2019,May
"Jian Pang,Shotaro Maki,Seitaro Kawai,Noriaki Nagashima,Yuuki Seo,Masato Dome,Hisashi Kato,Makihiko Katsuragi,Kento Kimura,Satoshi Kondo,Yuki Terashima,Hanli Liu,Teerachot Siriburanon,Tn Aravind,Nurul Fajri,Tohru Kaneko,Toru Yoshioka,Bangan Liu,Yun Wang,Rui Wu,Ning Li,Korkut Kaan Tokgoz,Masaya Miyahara,Atsushi Shirane,Kenichi Okada","A 50.1Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay with Calibration of LO Feed-Through and I/Q Imbalance",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 5","pp. 1375-1390",2019,May
"Yun Wang,Bangan Liu,Hanli Liu,Tn Aravind,Jian Pang,Ning Li,Toru Yoshioka,Yuki Terashima,Haosheng Zhang,Dexian Tang,Makihiko Katsuragi,Daeyoung Lee,Sungtae Choi,Rui Wu,Kenichi Okada,Akira Matsuzawa","A 100mW 3.0Gb/s Spectrum Efficient 60GHz Bi-Phase OOK CMOS Transceiver","IEEE Symposium on VLSI Circuits",,,,,,2017,June
"Yuncheng Zhang,Ngo Huy Cu,’†“c Œ›Œá,‹g‰ª “§,Yuki Terashima,Bangan Liu,‰ª“c Œ’ˆê,�¼àV �º","An Ultra-Low-Power Synthesizable Digitally Controlled Oscillator","“dŽq�î•ñ’Ê�MŠw‰ï ‘��‡‘å‰ï",,,"  C-12",,,2017,Mar.
"Bangan Liu,Ngo Huy Cu,’†“c Œ›Œá,‹g‰ª “§,Yuki Terashima,‰ª“c Œ’ˆê,�¼àV �º","A Study of Injection-locking PLL Phase Calibration with Symmetrical Phase Detector and Multiplexer","“dŽq�î•ñ’Ê�MŠw‰ï ‘��‡‘å‰ï",,,"  C-12",,,2017,Mar.
"Ngo Huy Cu,’†“c Œ›Œá,‹g‰ª “§,Ž›“ˆ—FŽ÷,‰ª“c Œ’ˆê,�¼àV �º","Žü”g�”’ü”{Ší‚É‚æ‚é’�“ü“¯ŠúPLL ‚ÌŽG‰¹—}�§Žè–@","“dŽq�î•ñ’Ê�MŠw‰ï ‘��‡‘å‰ï",,,"  C-12",,,2017,Mar.
"Ngo Huy Cu,’†“c Œ›Œá,‹g‰ª “§,Yuki Terashima,‰ª“c Œ’ˆê,�¼àV �º","A 0.42ps-Jitter -241.7dB-FOM Synthesizable Injection-Locked PLL with Noise-Isolation LDO","“dŽq�î•ñ’Ê�MŠw‰ï ƒAƒiƒ�ƒORFŒ¤‹†‰ï",,,"Vol. RF2017-3",,,2017,Mar.
"Huy Cu Ngo,Kengo Nakata,Toru Yoshioka,Yuki Terashima,Kenichi Okada,Akira Matsuzawa","A 0.42ps-Jitter -241.7dB-FOM Synthesizable Injection-Locked PLL with Noise-Isolation LDO","EEE International Solid-State Circuits Conference (ISSCC),",,,,,,2017,Feb.
"Ngo Huy Cu,’†“c Œ›Œá,‹g‰ª “§,Yuki Terashima,‰ª“c Œ’ˆê,�¼àV �º","A 0.42ps-Jitter -241.7dB-FOM Synthesizable Injection-Locked PLL with Noise-Isolation LDO","IEEE SSCS Japan Chapter ISSCC•ñ��‰ï",,,,,,2017,Feb.
"Dongsheng Yang,Wei Deng,Yuki Terashima,Teerachot Siriburanon,Tn Aravind,Toru Yoshioka,Kenichi Okada,Akira Matsuzawa","An LC-VCO based Synthesizable Injection-Locked PLL with an FoM of -250.3dB","IEEE European Solid-State Circuits Conference (ESSCIRC)",,,,,,2016,Sept.
"Ngo Huy Cu,Ž›“ˆ—FŽ÷,‹g‰ª “§,‰ª“c Œ’ˆê,�¼àV �º","Ž©“®”z’u”z�ü‰Â”\‚ÈLCŒ^DCO‚̉ð�Í","“dŽq�î•ñ’Ê�MŠw‰ï ƒ\ƒTƒCƒGƒeƒB‘å‰ï",,,,,"  C-12-7",2016,Sept.
"Tharayil Narayanan Aravind,Makihiko Katsuragi,Kengo Nakata,Yuki Terashima,Kenichi Okada,Akira Matsuzawa","A Noise Reduction Technique for Divider-Less Fractional-N Frequency Synthesizer using Phase-Interpolation Technique","IEEE ACM Asia South Pacific Design Automation Conference",,,,,,2016,Jan.
"Aravind Tharayil Narayanan,Makihiko Katsuragi,Kento Kimura,Satoshi Kondo,Korkut Kaan Tokgoz,Yuki Terashima,Wei Deng,Kenichi Okada,Akira Matsuzawa","A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator with an FoM of -246dBc/Hz","IEEE European Solid-State Circuits Conference (ESSCIRC)",,,,,,2015,Sept.
"Ž›“ˆ —FŽ÷,Teerachot Siriburanon,‰ª“c Œ’ˆê,�¼àV �º","2.25•ªŽüŠí‚ÉŠÖ‚·‚錟“¢","“dŽq�î•ñ’Ê�MŠw‰ï ƒ\ƒTƒCƒGƒeƒB‘å‰ï",,,"  C-12-17",,,2014,Sept.