論文

• Hsuan Chun Liao, TSUYOSHI ISSHIKI, Mochamad Asri, DONGJU LI, hiroaki kunieda. A High Level Design of Reconfigurable and High-performance ASIP Engine for Image Signal Processing, IEICE Trans. Fundamentals, Vol. E95-A, No. 12, pp. 2373 - 2383, Dec. 2013.
• Hsuan Chun Liao, TSUYOSHI ISSHIKI, Mochamad Asri, DONGJU LI, hiroaki kunieda. A Design of High Performance Parallel Architecture and Communication for Multi-ASIP Based Image Processing Engine, IEICE Trans. Fundamentals, Vol. E96-A, No. 6, pp. 1222 - 1235, June 2013.
• Hsuan Chun Liao, Mochamad Asri, TSUYOSHI ISSHIKI, DONGJU LI, hiroaki kunieda. Flexible and High Performance ASIPs for Pixel Level Image Processing Two Dimensional Image Processing, 情報処理学会論文誌, Vol. 54, No. 7, pp. 552 - 562, Feb. 2013.

国際会議発表 (査読有り)

• Mochamad Asri, Hsuan Chun Liao, TSUYOSHI ISSHIKI, DONGJU LI, hiroaki kunieda. A Reconfigurable ASIP-Based Approach for High Performance Image Signal Processing, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Dec. 2012.
• Hsuan Chun Liao, Mochamad Asri, TSUYOSHI ISSHIKI, DONGJU LI, hiroaki kunieda. A Reconfigurable High Performance ASIP Engine for Image Signal Processing, IEEE 26th International Parallel and Distributed Processing Symposium, May 2012.
• Mochamad Asri, Naoki Fujieda, Kenji Kise. Rethinking Processor Instruction Fetch:Inefficiencies-Cracking Mechanism, International SoC Design Conference(ISOCC2011), Nov. 2011.

国内会議発表 (査読なし・不明)

• Mochamad Asri, Kenji Kise. Speeding processor up by employing instruction register, 情報処理学会第73回全国大会, Vol. 1, No. 1H-3, pp. 55-56, Mar. 2011.
• 坂口嘉一, モッハマドアスリ, 高前田伸也, 金子晴彦, 吉瀬謙二. 誤り訂正符号を用いた計量な高速シリアル通信機構の実装と評価, 電子情報通信学会研究報告 ＣＰＳＹ2010-19, pp. 67-72, Aug. 2010.

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