論文

• Tamon Sadasue, Tsuyoshi Isshiki. LLVM-C2RTL: C/C++ Based System Level RTL Design Framework Using LLVM Compiler Infrastructure, IPSJ Transactions on System and LSI Design Methodology, Vol. 16, pp. 12 - 26, Feb. 2023.
• Tamon Sadasue, Takuya Tanaka, Ryosuke Kasahara, Arief Darmawan, Tsuyoshi Isshiki. Scalable Hardware Architecture for fast Gradient Boosted Tree Training, IPSJ Transactions on System LSI Design Methodology, Vol. 14, pp. 11 - 20, Feb. 2021.

国際会議発表 (査読有り)

• Tamon Sadasue, Tsuyoshi Isshiki. Scalable Full Hardware Logic Architecture for Gradient Boosted Tree Training, IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2020.

学位論文

• C/C++ Based System Level RTL Design Methodology and Its Design Efficiency Using LLVM Compiler Infrastructure,  Thesis,  Doctor (Engineering),  Tokyo Institute of Technology,  2023/03/26,   
• C/C++ Based System Level RTL Design Methodology and Its Design Efficiency Using LLVM Compiler Infrastructure,  Summary,  Doctor (Engineering),  Tokyo Institute of Technology,  2023/03/26,   
• C/C++ Based System Level RTL Design Methodology and Its Design Efficiency Using LLVM Compiler Infrastructure,  Exam Summary,  Doctor (Engineering),  Tokyo Institute of Technology,  2023/03/26,   

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