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和田和千 研究業績一覧 (36件)
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論文
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Shigetaka Takagi,
Retdian Agung Nicodimus,
Kazuyuki Wada,
Takahide Sato,
Nobuo Fujii.
Multi-Path Analog Circuits Robust to Digital Substrate Noise,
IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences,
The Institute of Electronics, Information and Communication Engineers,
Vol. E91-A,
No. 2,
pp. 535-541,
Feb. 2008.
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Retdian A. Nicodimus,
Shigetaka Takagi,
Kazuyuki Wada.
Active Shield Circuits for Digital Noise Suppression in Mixed-Signal Integrated Circuits,
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences,
The Institute of Electronics, Information and Communication Engineers,
Vol. 88-A,
No. 2,
pp. 438-443,
Feb. 2005.
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Takahide Sato,
Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
Extension of Current Conveyor Concept and Its Applications,
IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences,
Vol. E85-A,
No. 2,
pp. 414-421,
Feb. 2002.
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Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
Linear Voltage-to-Current Converter with Wide Dynamic Range,
Proceedings of 2000 IEEJ International Analog VLSI Workshop,
pp. 124-129,
2000.
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Takahide Sato,
Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
1.5-V OTA Using MOSFET's in Weak-Inversion Region,
Proceedings of 2000 IEEE International Symposium on Intelligent Signal Processing and Communication Systems,
pp. 643-646,
2000.
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Takahide Sato,
Mamoru Nakamura,
Shigetaka Takagi,
Kazuyuki Wada,
Nobuo Fujii.
Voltage Regulating Circuit Using Depletion-Type MOSFET's and Its Application to Low-Voltage OTA Realization,
Proceedings of 2000 IEEJ International Analog VLSI Workshop,
pp. 119-123,
2000.
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Kyoichi Takenaka,
Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
Power Saving Technique for MOS Differential Amplifiers,
Proceedings of 2000 IEEE International Symposium on Circuits and Systems,
Vol. 5,
pp. 213-216,
2000.
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Emami Sohrab,
Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
A Novel Class A CMOS Current Conveyer,
Proceedings of 2000 IEEE International Symposium on Circuits and Systems,
Vol. 4,
pp. 453-456,
2000.
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Takahide Sato,
Mamoru Nakamura,
Shigetaka Takahide,
Kazuyuki Wada,
Nobuo Fujii.
Mobility-Reduction-Free Low-Distortion OTA Using Backgate-Bias,
Proceedings of 2000 IEEE Asia Pacific Conference on Circuits and Systems,
pp. 279-282,
2000.
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Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
Simple Linear Transconductors with Low Power Supply Voltage,
Proceedings of 1999 IEEE International Symposium on Intelligent Signal Processing and Communication Systems,
pp. 629-632,
1999.
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Shigetaka Takagi,
Kazuyuki Wada,
Nobuo Fujii,
Takeshi Yanagisawa.
Novel Automatic Tuning System using PLL with Switched Capacitor Circuit Technique,
Proceedings of the Asia-Pcific Conference on Circuits and Systems,
pp. 699-702,
1998.
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Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
Reduction in Output DC Offset Voltage of Integrator-Based Filters,
Proceedings of 1998 IEEE International Conference on Electronics, Circuits, and Systems,
Vol. 2,
pp. 17-20,
1998.
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高木茂孝,
藤井信生,
和田 和千.
寄生素子による特性劣化を低減した積分器構成連続時間系フィルタ,
電子情報通信学会論文誌 A,
Vol. J81-A,
No. 7,
pp. 1049-1058,
1998.
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Shigetaka Takagi,
Nobuo Fujii,
Kazuyuki Wada.
Automatic Tuning System for Integrator-Based Continuous-Time Filters,
Analog Integrated Circuits and Signal Processing,
Vol. 16,
No. 3,
pp. 225-238,
1998.
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高木茂孝,
藤井信生,
和田 和千.
積分器構成フィルタにおける単位利得周波数の広がりの抑圧と周波数特性の改善,
電子情報通信学会論文誌 A,
Vol. J81-A,
No. 9,
pp. 1205-1212,
1998.
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Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
Reduction of Characteristic Deviations due to Parasitic Elements on Integrator-Based Filters,
Proceedings of 1997 IEEE International Symposium on Circuits and Systems,
Vol. 1,
pp. 345-348,
1997.
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Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
Design of Integrated Continuous-Time Filters with Low Group-Delay Sensitivities,
Proceedings of 1996 IEEE Asia Pacific Conference on Circuits and Systems,
pp. 65-68,
1996.
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Shigetaka Takagi,
Kazuyuki Wada,
Nobuo Fujii,
Mohammed Ismail,
Dong Yong Kim.
A Novel Area-Efficient MOSFET-C Filter Design Methodology,
Proceedings of 1996 IEEE Asia Pacific Conference on Circuits and Systems,
pp. 53-56,
1996.
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Kazuyuki Wada,
Shigetaka Takagi,
Nobuo Fujii.
Automatic Tuning System for High-Frequency Integrated Continuous-Time Filters,
Proceedings of 1996 IEEE International Symposium on Circuits and Systems,
Vol. 1,
pp. 85-88,
1996.
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Shigetaka Takagi,
Zdzislaw Czarnul,
Nobuo Fujii,
Kazuyuki Wada.
Topology-Independent Predistortion for Integrator-Based Filters,
IEICE Trans. Fundamentals,
Vol. E79-A,
No. 2,
pp. 176-183,
1996.
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Kazuyuki Wada,
Shigetaka Takagi,
Zdzislaw Czarnul,
Nobuo Fujii.
Design Automation for Integrated Continuous-Time Filters Using Integrators,
Proceedings of Asia and South-Pacific Design Automation Conference,
pp. 435-439,
1995.
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Shigetaka Takagi,
Nobuo Fujii,
Kazuyuki Wada.
A Drive of Input and Output Impedance Effects of Functional Blocks into a Frequency Shift of Active Circuits,
IEICE Trans. Fundamentals,
Vol. E78-A,
No. 2,
pp. 177-184,
1995.
国際会議発表 (査読有り)
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Shigetaka Takagi,
Nicodimus Retdian,
Kazuyuki Wada,
Nobuo Fujii.
Active Guard Band Circuit for Substrate Noise Suppression,
IEEE Int. Conf. on Circuits and Systems,
Proceedings of 2001 International Symposium on Circuits and Systems,
IEEE,
Vol. 1,
pp. 548-551,
May 2001.
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Takahide Sato,
Mamoru Nakamura,
Kazuyuki Wada,
Shigetaka Takagi,
NOBUO FUJII.
Mobility-Reduction-Free Low-Distortion OTA using Backgate-Bias Technique,
2000 IEEE Asia-Pacific Conference on Circuit and Systems,
Proc. IEEE Asia-Pacific Conference on Circuit and Systems,
pp. 279-282,
Dec. 2000.
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Takahide Sato,
Kazuyuki Wada,
Shigetaka Takagi,
NOBUO FUJII.
1.5-V OTA Using MOSFET's in Weak-Inversion Region,
IEEE International Symposium on Intelligent Signal Processing and Communication Systems,
Proc. IEEE International Symposium on Intelligent Signal Processing and Communication Systems,
vol. II,
pp. 634-646,
Nov. 2000.
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Takahide Sato,
Mamoru Nakamura,
Kazuyuki Wada,
Shigetaka Takagi,
NOBUO FUJII.
Voltage Regulating Circuit Using Depletion-Type MOSFET's and its Application to Low-Voltage OTA Realization,
2000 IEEJ International Analog VLSI Workshop,
Proc. IEEJ International Analog VLSI Workshop,
Vol. 2000,
pp. 119-123,
May 2000.
国内会議発表 (査読有り)
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佐藤隆英,
中村守,
和田和千,
高木茂孝,
藤井信生.
ディプリーション型MOSFETを用いた低歪みOTAとその応用,
回路とシステム(軽井沢)ワークショップ,
回路とシステム(軽井沢)ワークショップ,
Vol. 2000,
pp. 47-52,
Apr. 2000.
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佐藤隆英,
中村守,
和田和千,
高木茂孝,
藤井信生.
キャリアの移動度の変化及び基板効果の影響を受けない低歪みOTA,
電子回路研究会,
電気学会資料集 電子回路研究会,
Vol. ECT00,
No. 32-37,
pp. 19-24,
Apr. 2000.
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佐藤隆英,
和田和千,
高木茂孝,
藤井信生.
DCオフセットの無いソースフォロワを用いた電圧設定回路,
電子回路研究会,
電気学会資料集 電子回路研究会,
Vol. ECT00,
No. 1-20,
pp. 59-64,
Jan. 2000.
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佐藤隆英,
和田和千,
高木茂孝,
藤井信生.
非飽和領域で動作するMOSFETを用いたOTAの一構成法,
電子回路研究会,
電気学会資料集 電子回路研究会,
Vol. ECT99,
No. 110-128,
pp. 25-30,
Oct. 1999.
国内会議発表 (査読なし・不明)
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和田和千,
清川幸哉,
ニコデムス レディアン,
高木茂孝,
佐藤隆英,
藤井信生.
信号分割手法に基づき基板雑音と歪みを同時に低減するためのフィルタ構成,
電子回路研究会,
電気学会研究会資料,
電気学会,
Vol. ECT-08,
No. 32,
pp. 23-28,
Mar. 2008.
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鈴木寛人,
ニコデムス レディアン,
和田 和千,
高木 茂孝.
ガードリングと接地領域の形状による基板雑音の低減効果の検討,
電子回路研究会,
Proc. of Technical Meeting on Electronics Circuits,
電気学会,
Vol. ECT-04,
No. 26-35,
pp. 23-26,
Mar. 2004.
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ニコデムス レディアン,
和田和千,
高木茂孝,
鈴木寛人.
Optimized Design of Active Shield Circuit with Consideration on On-Chip Layout,
電子回路研究会,
電気学会電子回路研究会資料,
電気学会,
Vol. ECT-04,
No. 31,
pp. 27-30,
Mar. 2004.
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Nicodimus Retdian Agung,
Shigetaka Takagi,
Kazuyuki Wada,
Nobuo Fujii.
Design Optimization of Active Guard Band Circuit with Consideration on Device Matching and Frequency Characteristics,
IEEJ Technical Meeting on Electronics Circuits,
Proc. of Technical Meeting on Electronics Circuits,
The Insitute of Electrical Engineers of Japan,
Vol. ECT-02,
No. 1-12,
pp. 13-18,
Jan. 2002.
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Shigetaka Takagi,
Nicodimus Retdian Agung,
Kazuyuki Wada,
Nobuo Fujii.
Substrate Noise Suppression Using Active Guard Band Circuit,
IEEJ Technical Meeting on Electronics Circuits,
Proc. of Technical Meeting on Electronics Circuits,
The Insitute of Electrical Engineers of Japan,
Vol. ECT-00,
No. 38-61,
pp. 107-112,
June 2000.
学位論文
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